In general and simplistic terms, digital computers are comprised of two main components, namely the data manipulation circuitry (of which the ALU, arithmetic and logic unit, forms one part) and the computer control unit (CCU) which controls the internal buses and subsystems of the data manipulation circuitry (also referred to as the processor), and synchronizes internal and external events and grants or denies permission to external systems.
In a typical digital computer, a data bus is commonly used by all of the subsystems (e.g. CCU, ALU, memories, etc.) in the computer. Information, instructions, address operands, data, and sometimes control signals are transmitted down the data bus under the control of a microprogramme. Note that a microprogramme is a form of programme used to run the internal logic of a computer by which a large portion of the computer's control is performed by a read only memory, ROM, (usually a programmable read only memory, PROM) rather than large arrays of gates and flip-flops. The use of microprogrammes frequently reduces the hardware needed in the CCU and provides a highly ordered structure in the CCU, not normally present when random logic is used. Additionally, microprogramming makes changes in the computer's instruction set very simple to perform, thereby reducing the post-production engineering costs for the system substantially.
The microprogramme selects the source of the data as well as the destination of the data. In complicated computers there may be more than one data bus.
An address bus is typically used to select a word stored in memory for an internal computer function, or to select an input/output port for an external subsystem or peripheral function. Also selected by microprogramme command, the source of the information for the address bus may be a programme counter, a memory address register, a direct memory address controller, or an interface controller, etc.
The arithmetic and logic unit (ALU) is actually that portion of the processor that computes. Depending upon the complexity of the ALU, a large number of different arithmetic functions can be accomplished. The most common minimum set, however, are the functions (A plus B), (A minus B), and (B minus A); where A and B are the ALU inputs. The logical functions are obtained from the same combinatorial logic array that is used for the arithmetic functions, but it is gated in a different manner. The usual minimum logical function capability is (A or B), (A AND B), and (A EXCLUSIVE-OR B). In addition to these combinatorial logic functions, there are sets of shift and rotate instructions that complete the basic instruction set.
The purpose of the computer control unit (CCU) is to translate an address into a microinstruction that can be fetched and executed. Note that there are two types of instructions recognized within the CCU, machine language (or macroinstructions) and random logic replacement (or microinstructions). Macroinstructions reside in main memory, are fetched and decoded into microinstructions which directly control the computer's resources.
As will be explained more fully later in this specification, a pipeline (or microprogramme) register is employed in the CCU to provide a function known as pipelining. In this process, a microinstruction is loaded from a microprogramme ROM into the microprogramme register (or pipeline register). A pipeline register speeds up a state rachine of this sort because it allows the address of the microprogramme ROM to be changed, and its output to settle, while the current microinstruction is being presented to the computer hardware (ALU, processor) from the pipeline register. In other words, the pipeline register contains the microinstruction currently being executed while the next microinstruction to be executed sits at the input of the pipeline register. The result is that while the processor is executing one instruction, the next instruction is being fetched. The presence of the pipeline register allows the microinstruction fetch to occur concurrently with the data manipulation operation in the processor, rather than serially.
It is desirable to control the operation of the processor, via the CCU, with commands such as WAIT and SKIP. WAIT is a command used when synchronizing the relatively fast CCU with a relatively slow memory or input/output function. The WAIT command causes the processor to stop until the selected device acknowledges the operation is complete or the data is ready.
The SKIP command (not always used in the prior art) is employed with certain logic functions such that if a certain result is obtained (e.g. a positive result) then the next instruction (e.g. an error indication) is skipped.
The book Am2900 Bipolar Microprocessor Family copyrighted 1976 by Advanced Micro Devices, Inc. (AMD) of 901 Thompson Place, Sunnyvale, Calif. 94086, describes in detail the devices and features that have been discussed. Particular attention should be made to the device referred to as Am2901 (four-bit bipolar microprocessor slice) and described on pages 4 to 21 inclusive of the aforementioned book by AMD and also to the device referred to as Am2909 (microprogramme sequencer) and described on pages 44 to 63 inclusive of the aforementioned book by AMD.
Referring once again to the previously mentioned WAIT and SKIP commands, some complexity is encountered in implementing these commands due to the pipelining (i.e. pipeline register) technique employed. It will be recalled that while the current microinstruction is being executed, the next microinstruction sits at the input of the pipeline register. Consequently, if a SKIP command is to be the next command executed, a now unwanted microinstruction is already waiting on stand-by, so to speak, and it must be gotten rid of before the next desired microinstruction can be loaded into the pipeline register. A somewhat similar problem occurs for a WAIT command. When a WAIT command is being executed the next microinstruction is sitting at the input of the pipeline register, ready to be loaded into the pipeline register at the next clock pulse. The prior art, as exemplified by the Figure on page 60 of the aforementioned book by AMD, accomplishes the WAIT and SKIP function in a relatively complex fashion.